AMD Zen 6 architecture claims 27% IPC improvement over Zen 5

AMD revealed details about its Zen 6 architecture at a launch event in Las Vegas. The company says Zen 6 provides an average 27% geomean instructions per clock (IPC) improvement over Zen 5. This figure includes a 31% increase in AI workload performance and a 20% bump for server and enterprise workloads. AMD notes that this 27% IPC uplift compares Zen 6c to Zen 5 rather than standard Zen 6 cores to Zen 5.

Image: Club386

Zen 6 core complex dies (CCDs) can now hold up to 12 cores, while Zen 6c can hold up to 32 cores per CCD. AMD says EPYC Venice CPUs using this architecture can reach up to 256 cores. The architecture maintains 4MB of L3 cache per core. This results in a maximum shared L3 cache pool of 48MB per CCD for Zen 6 and up to 128MB per CCD for Zen 6c.

AMD is currently shipping Zen 6 processors through its 6th-gen Epyc series. These Epyc processors have a maximum frequency of 5.3GHz and a 300MHz clock speed bump relative to Zen 5. More information regarding Zen 6 Ryzen processors, codenamed Olympic Ridge, is expected in 2027.