Micron roadmap targets DDR6 with twice the DDR5 bandwidth

Micron has revealed a technology roadmap for DRAM and NAND storage to meet AI demands. The company says its DDR6 architecture will provide over twice the bandwidth of DDR5. For mobile and data center use, Micron says LPDDR6 will offer an energy efficiency gain of more than 35% over LPDDR5. Both standards will use Micron's upcoming 1δ DRAM node, which the company says provides angstrom level process control and better bit density.

For AI applications, Micron plans to use vHBM designs that stack memory directly on top of a compute chip to improve bandwidth per watt. The company also plans to produce G11 NAND with more than 400 layers using wafer-on-wafer bonding. Micron says G11 NAND will double the bit density of the G9 generation, increase I/O speeds by up to 1.5x, and reduce power use by more than 25% per bit moved compared to G9. Micron expects mass production of the 1δ node and G11 NAND to begin in the second half of 2027.