Intel D270 chip details emerge with 32 Xe3P cores and 256 XMX engines

Intel recently announced D-series Crescent Island inference hardware built on the Xe3P architecture. A bare die shot of the D270 SKU on the official site shows the chip contains 32 Xe3P cores, 256 Vector engines, and 256 XMX engines. These XMX engines feature a 16-deep processing layout and are split into groups of eight for every core. The processor contains a 32 MB unified L2 cache, a 512 KB L1 cache for each core, and 1 MB of register files per core.

Image: TechPowerUp

The Xe3P architecture is built specifically for artificial intelligence inference workloads instead of training. Because the silicon omits standard imagery output features, it concentrates on agentic tasks and massive 100K context workloads. The D270 supports FP4 and FP8 data formats alongside a built-in media subsystem containing four decoders and four encoders. Systems can equip the card with up to 480 GB of LPDDR5X memory. It functions as a 350 W, air-cooled PCIe 5.0 x16 device suitable for standard server environments.